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A look inside: Filling the Gen 2 RFID chip void

The next generation of radio frequency identification (RFID) chip holds promise for innovative applications that engineers will design within the next few years. Semiconductor Insights takes a look inside Impinj's MONZA chip to find the gems in Gen 2.

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RFID World

Those tiny radio frequency identification (RFID) chips that found their way into labels sewn into Levi's jeans, glued inside Rogaine boxes, and embedded on Viagra pill bottles are improving with age. Are you ready? Companies are adopting varying design philosophies, and relying on a mixture of established and modern approaches to get there. STMicroelectronics (3.25 mm² die area) and Texas Instruments (2.73 mm² die area) use large dice with three and two metal layers, respectively. The TI device is fabricated in 0.9 µm design rules whereas STMicroelectronics, along with Philips Semiconductor, use 0.5 µm and 0.4 µm design rules, respectively. Philips has opted for a much smaller die at 0.78 mm² that requires five layers of metallization as a consequence. STMicroelectronics and TI appear to use less expensive and space saving MNOS EEPROM structure as opposed to the Philips device, which uses the more reliable and lower voltage floating gate process.

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